DocumentCode
1747335
Title
Dynamic scheduling rule selection for semiconductor wafer fabrication
Author
Hsieh, Bo-Wei ; Chang, Shi-Chang ; Chen, Chun-Hung
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
1
fYear
2001
fDate
2001
Firstpage
535
Abstract
We exploit the speed of an ordinal optimization (OO)-based simulation tool designed by Hsieh et al. (1999) to investigate dynamic selection of scheduling rules for semiconductor wafer fabrication (FAB). Although a scheduling rule is a combination of loading wafer release and dispatching rules, this paper specifically focuses on dispatching when significant amount of wafers-in-process are held due to engineering causes and when major machine failures occur. Four prominent dispatching rules combined with the wafer release policy of workload regulation constitute a basic set of rule options. The dispatching rule may be weekly selected based on FAB states over a four-week horizon. A total of 756 rule options are then evaluated and ranked by the OO-based simulation tool under the performance index of mean cycle time and throughput rate. Results demonstrate the value of dynamic rule selection for uncertainty handling, the insightful selection of good rules and the needs for further research.
Keywords
integrated circuit manufacture; optimisation; performance index; production control; dispatching rules; optimization; performance index; production control; scheduling rule; semiconductor wafer fabrication; wafer-in-process; workload regulation; Dispatching; Dynamic scheduling; Fabrication; Industrial engineering; Job shop scheduling; Modeling; Optimal control; Performance analysis; Processor scheduling; Uncertainty;
fLanguage
English
Publisher
ieee
Conference_Titel
Robotics and Automation, 2001. Proceedings 2001 ICRA. IEEE International Conference on
ISSN
1050-4729
Print_ISBN
0-7803-6576-3
Type
conf
DOI
10.1109/ROBOT.2001.932605
Filename
932605
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