IC design in high-cost nanometer-technologies era

Nanometer IC technologies are on the horizon. They promise a lot, but will cost a lot as well. Therefore, we need to ask today: how may the billions of dollars, that we will have to spent on nanometer-fablines, affect the IC design domain? This paper attempts to address the above question by analyzing the design-manufacturing interface. A partial answer is derived from a simple transistor cost model proposed in the body of the paper.