• DocumentCode
    1747876
  • Title

    Logic minimization using exclusive OR gates

  • Author

    Ciriani, Valentina

  • Author_Institution
    Dipartimento di Inf., Pisa Univ., Italy
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    115
  • Lastpage
    120
  • Abstract
    Recently introduced pseudoproducts and sum of pseudoproduct (SPP) forms have made it possible to represent Boolean functions with much shorter expressions than standard sum of products (SP) forms. A pseudo product is a product (AND) of exclusive OR (EXOR) factors, and an SPP form is a sum (OR) of pseudoproducts. The synthesis of SPP minimal forms requires greater effort than SP minimization. In this paper we present a new data structure for this problem, leading to an efficient minimization method for SPP forms implemented with an exact algorithm and an heuristic. Experimental results on a classical set of benchmarks show that the new algorithms are fast, and can be applied to "complex" functions with a reasonable running time.
  • Keywords
    Boolean functions; data structures; logic CAD; logic gates; minimisation of switching nets; Boolean functions; data structure; exact algorithm; exclusive OR; exclusive OR gates; logic minimization; pseudoproducts; running time; sum of pseudoproduct; Boolean functions; Cost function; Data structures; Heuristic algorithms; Logic gates; Minimization methods; Permission;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2001. Proceedings
  • ISSN
    0738-100X
  • Print_ISBN
    1-58113-297-2
  • Type

    conf

  • DOI
    10.1109/DAC.2001.156119
  • Filename
    935488