DocumentCode :
1748308
Title :
An improved figure of merit for symbol synchronisers
Author :
Lee, C.D. ; Darnell, M.
Author_Institution :
Inst. of Integrated Inf. Syst., Leeds Univ., UK
Volume :
2
fYear :
2001
fDate :
2001
Firstpage :
372
Abstract :
The contribution of this paper is to derive a novel figure of merit that can be measured in practice for symbol synchronisers. It is used to estimate the probability of symbol error, including the effect of symbol slip, for different frame and signaling alphabet sizes. The new figure of merit proves to provide a significantly more accurate characterisation than previously published methods. Specifically, by applying the novel figure of merit, the paper compares the symbol synchronisation performance of a conventional digital phase locked loop (DPLL) symbol synchroniser with that of modulation-derived synchroniser (MDS) under additive white Gaussian noise (AWGN) channel conditions
Keywords :
AWGN channels; digital phase locked loops; error statistics; synchronisation; AWGN channel; DPLL symbol synchronisers; additive white Gaussian noise channel; digital phase locked loop; figure of merit; frame size; modulation-derived synchroniser; signaling alphabet size; symbol error probability; symbol slip; symbol synchronisation performance; AWGN; Additive white noise; Digital filters; Digital modulation; Information filtering; Information filters; Magneto electrical resistivity imaging technique; Phase locked loops; Phase modulation; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, 2001. ICC 2001. IEEE International Conference on
Conference_Location :
Helsinki
Print_ISBN :
0-7803-7097-1
Type :
conf
DOI :
10.1109/ICC.2001.936965
Filename :
936965
Link To Document :
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