Reconfigurable platform design for wireless protocol processors

Author

Tuan, Tim ; Li, Suet-Fei ; Rabaey, Jan

Author_Institution

Berkeley Wireless Res. Center, California Univ., Berkeley, CA, USA

Volume

2

fYear

2001

fDate

2001

Firstpage

893

Abstract

Low-energy protocol processing is a crucial issue in next generation wireless systems. In modern wireless system design, this problem is tightly coupled with the signal processing needs. Fierce market competition and inventive wireless applications are imposing stricter design requirements in energy consumption, cost, size, and flexibility. To deal with these unique constraints, we incorporate the platform-based design methodology to deal with these constraints by advocating reusability. This paper presents this methodology, and its application on PicoRadio, a cutting-edge wireless system. In particular, we describe the design of a reconfigurable architecture optimized for protocol processing

Keywords

field programmable gate arrays; picocellular radio; programmable logic devices; protocols; reconfigurable architectures; signal processing; software reusability; FPGA; PLD; PicoRadio; energy consumption; field-programmable gate array; low-energy protocol processing; platform-based design; programmable logic device; reconfigurable architecture; reconfigurable logic architectures; reconfigurable platform design; signal processing; wireless protocol processors; wireless system design; Application software; Costs; Design methodology; Design optimization; Digital communication; Embedded system; Energy consumption; Process design; Signal processing; Wireless application protocol;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 2001. Proceedings. (ICASSP '01). 2001 IEEE International Conference on

Conference_Location

Salt Lake City, UT

ISSN

1520-6149

Print_ISBN

0-7803-7041-4

Type

conf

DOI

10.1109/ICASSP.2001.941059

Filename

941059