Title :
A programmable co-porcessor for MPEG-4 video
Author :
Berekovic, M. ; Stolberg, H.-J. ; Pirsch, P. ; Runge, H.
Author_Institution :
Inst. fur Theor. Nachrichtentechnik und Informationsverarbeitung, Hannover Univ., Germany
Abstract :
A programmable processor architecture for MPEG-4 video is proposed, that can serve as a co-processor module in MPEG-4 decoder systems. it consists of a 64-bit dual-issue VLIW macroblock engine, a separate RISC core for bitstream parsing and system processing, and an autonomous I/O processor. A separate DSP is used for MPEG audio support. The architecture is fully programmable and supports parallelism on data-, instruction- and thread-level to cope with the high flexibility and processing demands of the MPEG-4 standard. The first implementation will support realtime decoding of MPEG-4 advanced simple profile or of MPEG-4 ACE-profile (CCIR601, single-object). Future designs will add support for object-based MPEG-4 functionalities. The paper focuses on the architecture, instruction set, and performance of the macroblock engine, which operates as an autonomous co-processor and carries most of the workload in MPEG-4 video processing.. It has a RISC-based architecture with support for parallel processing of instructions and data. Special instructions are implemented with specific support for video processing
Keywords :
CMOS digital integrated circuits; code standards; coprocessors; data compression; decoding; digital signal processing chips; parallel architectures; programmable circuits; reduced instruction set computing; telecommunication standards; video coding; 64 bit; CCIR601; CMOS technology; I/O processor; MPEG audio; MPEG-4 ACE-profile; MPEG-4 standard; MPEG-4 video processing; RISC core; RISC-based architecture; VLIW macroblock engine; bitstream parsing; data-level parallelism; instruction set; instruction-level parallelism; macroblock engine performance; object-based MPEG-4; parallel processing; programmable processor architecture; realtime decoding; thread-level parallelism; Computer architecture; Coprocessors; Decoding; Digital signal processing; Engines; Layout; MPEG 4 Standard; Resilience; VLIW; Video coding;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 2001. Proceedings. (ICASSP '01). 2001 IEEE International Conference on
Conference_Location :
Salt Lake City, UT
Print_ISBN :
0-7803-7041-4
DOI :
10.1109/ICASSP.2001.941092
