Generic scheduling methods for a linear QR array SoC processor

Author

Liu, Zhaohui ; Lightbody, G. ; Walke, R. ; Hu, Y. ; McCanny, J.

Author_Institution

Sch. of Electr. & Electron. Eng., Queen´´s Univ., Belfast, UK

Volume

2

fYear

2001

fDate

2001

Firstpage

1097

Abstract

A scheduling method for implementing a generic linear QR array processor architecture is presented. This improves on previous work. It also considerably simplifies the derivation of schedules for a folded linear system, where detailed account has to be taken of processor cell latency. The architecture and scheduling derived provide the basis of a generator for the rapid design of System-on-a-Chip (SoC) cores for QR decomposition

Keywords

array signal processing; least squares approximations; matrix decomposition; parallel architectures; processor scheduling; CMOS triple-layer technology; QR decomposition; RLS filtering; adaptive beamforming; folded linear system; generic scheduling methods; linear QR array SoC processor; linear QR array processor architecture; processor cell latency; recursive least squares filtering; system-on-a-chip cores; Delay; Filtering; Laboratories; Least squares methods; Linear systems; Optical arrays; Processor scheduling; Resonance light scattering; System-on-a-chip; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 2001. Proceedings. (ICASSP '01). 2001 IEEE International Conference on

Conference_Location

Salt Lake City, UT

ISSN

1520-6149

Print_ISBN

0-7803-7041-4

Type

conf

DOI

10.1109/ICASSP.2001.941111

Filename

941111