Low power showdown: comparison of five DSP platforms implementing an LPC speech codec

An identical LPC speech coder has been implemented on a set of signal processing specific implementation platforms. The main goal of this experiment was to compare energy consumption. In addition, area/memory requirements and design time are also compared. The coder was first designed in floating-point C. Then, the fixed-point wordlengths were determined. Depending on the platform, either compiled code was generated, assembly code written or a Verilog/VHDL design was created. The platforms reported in this paper include the DSP processors TI C55×, TI C54×, TI C6× and the design environments Ocapi and A|RT Designer. Energy consumption ranged from 2 μJ to 288 μJ per speech frame. Upon scaling the results to the same technology, our results indicated that the lowest power DSP processor (TI C55×) still consumes a factor of four more energy than an application specific processor