The thermal scaling: From transistor to array

Author

Tianbing Chen ; Tzung-yin Lee ; Allum, Justin ; McPartlin, Mike

Author_Institution

Wafer Foundry Eng., Skyworks Solutions, Inc., Woburn, MA, USA

fYear

2014

fDate

1-3 June 2014

Firstpage

123

Lastpage

126

Abstract

The electrical and thermal performance scaling from transistor to array was studied in this paper to help improve the predictive modeling of the electrical-thermal behavior of bipolar arrays. The dc and ac performance scales well at low bias but not to the medium and high bias because thermal resistance does not scale to the total emitter area. It is demonstrated that after the correction of the R_TH in array models, the simulation can predict the electrical-thermal behavior of power arrays.

Keywords

Ge-Si alloys; arrays; heterojunction bipolar transistors; semiconductor materials; thermal resistance; HBT; SiGe; ac performance scales; bipolar array model; dc performance scales; electrical performance scaling; electrical-thermal behavior predictive modeling; high bias; medium bias; power arrays; thermal performance scaling; thermal resistance; total emitter area; transistor; Arrays; Heating; Junctions; Silicon germanium; Thermal resistance; Transistors; SiGe HBT; array; power amplifier; scaling; self-heating; thermal resistance;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium, 2014 IEEE

Conference_Location

Tampa, FL

ISSN

1529-2517

Print_ISBN

978-1-4799-3862-9

Type

conf

DOI

10.1109/RFIC.2014.6851675

Filename

6851675