A CMOS VCO architecture suitable for sub-1 volt high-frequency (8.7-10 GHz) RF applications

Author

Mostafa, Ahmed H. ; El-Gamal, Mourad N.

Author_Institution

Microelectron. & Comput. Syst. Lab., McGill Univ., Montreal, Que., Canada

fYear

2001

fDate

2001

Firstpage

247

Lastpage

250

Abstract

This paper proposes an LC-based oscillator structure which enables operation from a supply voltage as low as 0.85 V, while being suitable for high-frequency RF applications. Two VCO prototypes were fabricated in a standard 0.18 μm CMOS process. The 8.7 GHz VCO operates from a supply voltage of 0.85 V, consumes 6 mW, and exhibits -100 dBc/Hz phase noise at 600 kHz offset. The 10 GHz prototype operates from a supply voltage of 1 V, consumes 9 mW, and has -98 dBc/Hz phase noise at 600 kHz offset. A tuning range of 400-450 MHz is achieved without using varactors

Keywords

CMOS analogue integrated circuits; MMIC oscillators; circuit tuning; integrated circuit noise; low-power electronics; phase noise; voltage-controlled oscillators; 0.18 micron; 0.85 to 1 V; 10 GHz; 6 mW; 8.7 GHz; 9 mW; CMOS VCO architecture; LC-based oscillator structures; high-frequency RF applications; phase noise; standard CMOS process; tuning range; CMOS process; Circuit optimization; Circuit topology; Energy consumption; Phase noise; Prototypes; Radio frequency; Tuning; Voltage; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design, International Symposium on, 2001.

Conference_Location

Huntington Beach, CA

Print_ISBN

1-58113-371-5

Type

conf

DOI

10.1109/LPE.2001.945409

Filename

945409