A 2×2 MIMO 802.11 abgn/ac WLAN SoC with integrated T/R switch and on-chip PA delivering VHT80 256QAM 17.5dBm in 55nm CMOS

This paper describes 2×2 MIMO 802.11ac Stage 1 WiFi + BT combo SoC chip with integrated dual-band PAs, LNAs, T/R switches, as well as a power management unit. The measured RX sensitivity of OFDM54M is -77.5dBm/ -77dBm in 2.4GHz and 5GHz, respectively. With the proposed broadband TX architecture, a high output power of 17.5dBm for 802.11ac Stage 1 VHT80 256QAM was achieved, and is extendable to the upcoming 802.11ac Stage2 VHT160. The maximum throughput achieved is 580Mbps in VHT80 MCS9 two-spatial stream mode, AWGN channel, with short GI. This chip occupies 27.8mm² in 55nm 1P6M CMOS technology in which the MIMO WiFi RF and analog circuits occupies 7.7mm².