DocumentCode
1751963
Title
Design and testing of monolithic active pixel sensors for charged particle tracking
Author
Deptuch, G. ; Berst, J.D. ; Claus, G. ; Colledani, C. ; Dulinski, W. ; Goerlach, U. ; Gomoushkin, Yu. ; Hu, Y. ; Husson, D. ; Orazi, G. ; Turchetta, R. ; Riester, J.L. ; Winter, M.
Author_Institution
IReS, Strasbourg, France
Volume
1
fYear
2000
fDate
2000
Firstpage
15036
Abstract
A Monolithic Active Pixel Sensor (MAPS) for charged particle tracking based on a novel detector structure was proposed, simulated, fabricated and tested. The detector designed accordingly to this idea is inseparable from the readout electronics, since both of them are integrated onto the same, standard for a CMOS process, low-resistivity silicon wafer. The individual pixel is comprised of only 3 MOS transistors and a photodiode collecting the charge created in a thin undepleted epitaxial layer. This approach provides the whole detector surface sensitive to radiation (100% fill factor) with reduced pixel pitch (very high spatial resolution). This yields a low cost, high resolution and thin detecting device. The detailed device simulations using ISE-TCAD package have been carried out in order to study a charge collection mechanism and to validate the proposed idea. Consequently, two prototype chips have been fabricated using 0.6 μm and 0.35 μm CMOS processes. Special radiation tolerant layout techniques were used in the second chip design. Both chips were tested and fully characterised. The pixel conversion gain was calibrated using 5.9 keV photons and prototype devices were exposed to the 120 GeV/c pions beams at CERN. Obtained results preceded by general design ideas and simulation results are reviewed
Keywords
CMOS integrated circuits; monolithic integrated circuits; nuclear electronics; position sensitive particle detectors; readout electronics; silicon radiation detectors; CMOS process low-resistivity silicon wafer; ISE-TCAD package; Si; charge collection mechanism; charged particle tracking; monolithic active pixel sensors; pixel conversion gain; pixel pitch; radiation tolerant layout techniques; readout electronics; thin undepleted epitaxial layer; CMOS process; Detectors; MOSFETs; Particle tracking; Photodiodes; Prototypes; Readout electronics; Silicon; Spatial resolution; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium Conference Record, 2000 IEEE
Conference_Location
Lyon
ISSN
1082-3654
Print_ISBN
0-7803-6503-8
Type
conf
DOI
10.1109/NSSMIC.2000.949010
Filename
949010
Link To Document