Title :
A fast 100×100 pixel silicon retina for edge extraction with application in OCR
Author :
Burgi, Pierre-Yves ; Heitger, Friedrich
Author_Institution :
Centre Suisse d´´Electronique & Microtechnique, Neuchatel, Switzerland
Abstract :
A new analog VLSI architecture using the time domain for processing and encoding sensory information is proposed. This architecture is based on steerable filters to locally extract edge information (intensity and direction). This information is subsequently encoded using address-event pulses transmitted on asynchronous buses. The amplitude of the sensory signals are sampled in such a way that strong amplitudes are assigned short latencies. Furthermore, the sampling rate can be controlled dynamically to ensure optimum information transmission on the buses. An optical character recognition demonstrator, based on this front-end architecture, is briefly described
Keywords :
VLSI; computer vision; edge detection; filtering theory; image coding; image processing equipment; image sampling; image sensors; monolithic integrated circuits; optical character recognition; silicon; time-domain analysis; 100 pixel; OCR; Si; address-event pulses; analog VLSI architecture; asynchronous buses; edge extraction; optical character recognition; sensory information; silicon retina; spatial gradients; steerable filters; time domain encoding; time domain processing; Data mining; Delay; Encoding; Information filtering; Information filters; Optical pulses; Retina; Sampling methods; Silicon; Very large scale integration;
Conference_Titel :
Signal Processing and its Applications, Sixth International, Symposium on. 2001
Conference_Location :
Kuala Lumpur
Print_ISBN :
0-7803-6703-0
DOI :
10.1109/ISSPA.2001.949834
