Dual-mode 10MHz BW 4.8/6.3mW reconfigurable lowpass/complex bandpass CT ΣΔ modulator with 65.8/74.2dB DR for a zero/low-IF SDR receiver

Author

Yang Xu ; Zehong Zhang ; Baoyong Chi ; Qiongbing Liu ; Xinwang Zhang ; Zhihua Wang

Author_Institution

Dept. of Microelectron. & Nanoelectron., Tsinghua Univ., Beijing, China

fYear

2014

fDate

1-3 June 2014

Firstpage

313

Lastpage

316

Abstract

A dual-mode wideband reconfigurable lowpass /complex bandpass continuous-time sigma-delta (LP/CBP CT ΣΔ) modulator with digitally-assisting integrated in a zero/ low-IF SDR receiver is presented. The proposed modulator is capable of switching in either 3^rd-order LP or 2^nd-order CBP with 10MHz bandwidth (BW) in each mode. The power-efficient amplifiers in active-RC integrators are implemented with active feedforward and anti-pole-splitting compensation schemes. The 2-bit digitally-switched current-steering DAC with gate-leakage compensation is proposed to cover the current variation in LP/CBP mode and solve the unavoidable gate-leakage issue in deep submicron CMOS. Fabricated in 65nm CMOS, the modulator achieves 65.8dB DR, 62.2dB peak SNDR in LP 10MHz BW mode and 74.2dB DR, 63.9dB SNDR across 10MHz signal-band with center frequency of 6MHz in CBP mode, occupying a core area of 0.39mm². Powered by a 1.2-V supply, the effective power consumption is only 4.8 and 6.3mW in LP and CBP mode respectively, resulting in measured FoMs of 0.23 and 0.25pJ/conversion.

Keywords

CMOS digital integrated circuits; band-pass filters; compensation; continuous time filters; digital-analogue conversion; low-pass filters; radio receivers; sigma-delta modulation; software radio; 2^nd-order CBP mode; 3^rd-order LP; LP-CBP CT ΣΔ modulator; active feedforward compensation schemes; active-RC integrators; anti-pole-splitting compensation schemes; bandwidth 10 MHz; continuous-time sigma-delta modulator; deep submicron CMOS; digitally-switched current-steering DAC; dual-mode reconfigurable lowpass-complex bandpass CT ΣΔ modulator; frequency 6 MHz; gate-leakage compensation; power 4.8 mW; power 6.3 mW; power-efficient amplifiers; size 65 nm; unavoidable gate-leakage issue; voltage 1.2 V; word length 2 bit; zero-low-IF SDR receiver; CMOS integrated circuits; Filtering theory; Logic gates; Modulation; Receivers; Resistors; Switches; Continuous-time (CT); complex bandpass; lowpass; reconfigurable; sigma-delta (ΣΔ) modulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits Symposium, 2014 IEEE

Conference_Location

Tampa, FL

ISSN

1529-2517

Print_ISBN

978-1-4799-3862-9

Type

conf

DOI

10.1109/RFIC.2014.6851729

Filename

6851729