Title :
FPGA Implementation of a Recursive Rank One Updating Matrix Inversion Algorithm for Constrained MPC
Author :
He, Minghua ; Chen, Chong ; Zhang, Xueying
Author_Institution :
Fac. of Electr. Eng. & Autom., Fuzhou Univ.
Abstract :
The core computation load of a constrained model predictive control (MPC) problem with interior point method is to solve a linear equation during every iteration. According to the specific feature from problem formulation for constrained MPC, this paper proposed a recursive rank one updating matrix inversion algorithm for solving the linear equation. This algorithm is hardware implementation oriented. Its efficiency in implementing constrained MPC is verified by FPGA implementation results. More over, some important issues related to FPGA implementation of control algorithms are also investigated and discussed
Keywords :
field programmable gate arrays; iterative methods; matrix inversion; predictive control; FPGA implementation; constrained model predictive control; control algorithm; interior point method; iteration; linear equation; matrix inversion algorithm; recursive rank one updating; Application software; Application specific integrated circuits; Computer architecture; Equations; Field programmable gate arrays; Hardware; Power engineering computing; Predictive control; Predictive models; Signal processing algorithms; Constrained MPC; FPGA Implementation; Matrix Inversion; Rank One Updating;
Conference_Titel :
Intelligent Control and Automation, 2006. WCICA 2006. The Sixth World Congress on
Conference_Location :
Dalian
Print_ISBN :
1-4244-0332-4
DOI :
10.1109/WCICA.2006.1712439
