Title :
A 240GHz wideband QPSK receiver in 65nm CMOS
Author :
Thyagarajan, Siva V. ; Shinwon Kang ; Niknejad, Ali M.
Author_Institution :
Berkeley Wireless Res. Center, Univ. of California at Berkeley, Berkeley, CA, USA
Abstract :
This paper demonstrates a 240GHz wideband QPSK receiver in 65nm bulk CMOS. A direct-conversion mixer-first architecture is implemented with a 240GHz on-chip antenna. Wideband passive mixers at the front end employ a 240GHz LO and convert the received signal down to baseband. The baseband signal is then amplified using high gain, wide bandwidth amplifiers. The 240GHz LO chain consists of 27GHz/80GHz injection-locked oscillators, 80GHz amplifiers and a frequency tripler. The overall receiver gain is 25dB and the noise figure is 15dB from measurements. This receiver design achieves a data rate of 16Gbps with a power consumption of 260mW.
Keywords :
CMOS analogue integrated circuits; frequency multipliers; millimetre wave mixers; millimetre wave oscillators; quadrature phase shift keying; radio receivers; LO chain; baseband signal; bit rate 16 Gbit/s; bulk CMOS; direct-conversion mixer-first architecture; frequency 240 GHz; frequency 27 GHz; frequency 80 GHz; frequency tripler; gain 25 dB; injection-locked oscillators; noise figure; noise figure 15 dB; on-chip antenna; power 260 mW; power consumption; receiver design; size 65 nm; wide-bandwidth amplifiers; wideband QPSK receiver; wideband passive mixers; Bandwidth; Baseband; Gain; Mixers; Noise figure; Phase shift keying; Receivers; 240GHz; QPSK; baseband amplifier; communication; delayed transmission line; direct conversion; mixer-first architecture; on-chip slotted loop antenna; receiver; sub-terahertz; wideband;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2014 IEEE
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3862-9
DOI :
10.1109/RFIC.2014.6851741
