DocumentCode :
175266
Title :
A 17-mW 5-Gb/s 60-GHz CMOS transmitter with efficiency-enhanced on-chip antenna
Author :
Rui Wu ; Wei Deng ; Sato, Seiki ; Hirano, Takuichi ; Ning Li ; Inoue, Takeru ; Sakane, Hiroki ; Okada, Kenichi ; Matsuzawa, Akira
Author_Institution :
Tokyo Inst. of Technol., Tokyo, Japan
fYear :
2014
fDate :
1-3 June 2014
Firstpage :
381
Lastpage :
384
Abstract :
A 60-GHz CMOS transmitter with on-chip antenna for high-speed short-range wireless interconnection is presented. The radiation efficiency of the on-chip antenna is doubled using substrate loss improvement techniques. The transmitter fabricated in a 65-nm CMOS process achieves over 5Gb/s data rate with an EVM performance of -12 dB for BPSK modulation. The whole transmitter consumes 17 mW from a 1.2-V supply and occupies a core area of 0.64 mm2 including the on-chip antenna.
Keywords :
CMOS integrated circuits; field effect MIMIC; integrated circuit interconnections; millimetre wave antennas; phase shift keying; radio transmitters; BPSK modulation; CMOS transmitter; EVM performance; bit rate 5 Gbit/s; efficiency-enhanced on-chip antenna; frequency 60 GHz; high-speed short-range wireless interconnection; power 17 mW; radiation efficiency; size 65 nm; substrate loss improvement techniques; voltage 1.2 V; CMOS integrated circuits; Dipole antennas; Gain; Radio frequency; System-on-chip; Transmitting antennas; 60-GHz transmitter; CMOS; efficiency-enhanced technique; on-chip antenna;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2014 IEEE
Conference_Location :
Tampa, FL
ISSN :
1529-2517
Print_ISBN :
978-1-4799-3862-9
Type :
conf
DOI :
10.1109/RFIC.2014.6851747
Filename :
6851747
Link To Document :
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