Title :
Voltage controlled oscillator area reduction in nano-scale CMOS
Author :
Jha, Abhishek ; Liao, Kefei ; Yeap, Geoffrey ; Kenneth, K.O.
Author_Institution :
Silicon Integrated Microwave Circuits & Syst. Group, Univ. of Texas, Richardson, TX, USA
Abstract :
A 4.3-5.6 GHz (26% tuning range) voltage controlled oscillator (VCO) incorporating MOS bypass capacitors, MOS varactors, cross-coupled transistors, a current source and buffers underneath an inductor is demonstrated in 65-nm CMOS. Use of a simple inverter based buffer enables straightforward placement under an inductor. The bypass capacitors and other components are used to form a patterned ground shield that improves inductor Q. The measured phase noise of the VCO is -117dBc/Hz at 1 MHz offset from a 4.3GHz carrier. The VCO power consumption is 4 mW. The circuit occupies an area of 14,400 μm2, and exhibits FOMa and FOMta of -202 and -210 dB, respectively. The FOMta is at least 10 dB better than the others in the literature. The area is ~3X smaller compared to that of the VCO with all the components outside of the inductor.
Keywords :
CMOS analogue integrated circuits; MMIC oscillators; MOS capacitors; active networks; buffer circuits; constant current sources; inductors; integrated circuit noise; invertors; phase noise; varactors; voltage-controlled oscillators; FOM; MOS bypass capacitor; MOS varactor; VCO; cross-coupled transistor; current source; frequency 4.3 GHz to 5.6 GHz; gain -202 dB to -210 dB; inductor; inverter; nanoscale CMOS technology; patterned ground shield; phase noise measurement; power 4 mW; size 65 nm; voltage controlled oscillator area reduction; CMOS integrated circuits; Inductors; Phase noise; Tuning; Varactors; Voltage-controlled oscillators; CMOS; area efficiency; inductor; voltage controlled oscillator;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium, 2014 IEEE
Conference_Location :
Tampa, FL
Print_ISBN :
978-1-4799-3862-9
DOI :
10.1109/RFIC.2014.6851757