• DocumentCode
    1753881
  • Title

    High-performance modular exponentiation algorithm by using a new modified modular multiplication algorithm and common-multiplicand-multiplication method

  • Author

    Rezai, Abdalhossin ; Keshavarzi, Parviz

  • Author_Institution
    Semnan Univ., Semnan, Iran
  • fYear
    2011
  • fDate
    21-23 Feb. 2011
  • Firstpage
    192
  • Lastpage
    197
  • Abstract
    Modular exponentiation is fundamental operation in the many cryptosystem such as RSA. This operation is implemented by repeating modular multiplication which is time consuming for large operands. This paper presents a new modified Montgomery modular multiplication algorithm based on multiple bit scan-multiple bit shift technique, sliding window method and signed-digit representation. This new algorithm skips from zero digit partial multiplication and the following required addition. Then it shifts the partial results by using Barrel shifter in only one cycle instead of several cycles. In addition, we proposed new modular exponentiation algorithm based on this new modular multiplication algorithm and common-multiplicand-multiplication method. In this new algorithm, the common part of modular multiplication is computed once rather than several times. So the security of the cryptosystem which used this new algorithm increased considerably. The analysis results show that the number of multiplication steps in the proposed exponentiation algorithm is reduced on average at about 72%-87%, 66%-84%, 15%-61% and 54%-79% in compare with Dusse-Kaliski´s algorithm, Ha-Moon´s algorithm, Wu et al.´s algorithm and Wu´s algorithm respectively for d=3-8.
  • Keywords
    public key cryptography; Barrel shifter; Montgomery modular multiplication algorithm; RSA cryptosystem; bit scan-multiple bit shift technique; common-multiplicand-multiplication method; cryptosystem security; modular exponentiation algorithm; modular multiplication algorithm; signed-digit representation; sliding window method; Algorithm design and analysis; Computational efficiency; Coordinate measuring machines; Cryptography; Delay; Partitioning algorithms; Three dimensional displays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Internet Security (WorldCIS), 2011 World Congress on
  • Conference_Location
    London
  • Print_ISBN
    978-1-4244-8879-7
  • Electronic_ISBN
    978-0-9564263-7-6
  • Type

    conf

  • Filename
    5749849