DocumentCode :
1754181
Title :
Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature
Author :
Fukushima, T. ; Iwata, E. ; Bea, J. ; Murugesan, M. ; Lee, K. -W ; Tanaka, T. ; Koyanagi, M.
Author_Institution :
New Ind. Creation Hatchery Center (NICHe), Tohoku Univ., Sendai, Japan
fYear :
2010
fDate :
16-18 Nov. 2010
Firstpage :
1
Lastpage :
5
Abstract :
Chip-to-wafer bonding is a promising technology for 3D integration due to high production yield using known good dies (KGDs). However, conventional chip-to-wafer 3D integration lowers production throughput because pick-and-place chip assembly is employed. To overcome the problem, we proposed a new chip-to-wafer 3D integration using self-assembly by which many KGDs can be simultaneously, rapidly, and precisely aligned and tightly bonded on wafers. The driving force is liquid surface tension. Here, we used an aqueous solution including dilute HF. In this paper, we discuss the dependence of alignment accuracy on several parameters in self-assembly conditions. In addition, we describe mechanism on HF-assisted direct chip bonding to wafers without thermal compression.
Keywords :
integrated circuit yield; microassembling; self-assembly; surface tension; three-dimensional integrated circuits; wafer bonding; KGD; alignment accuracy evaluation; aqueous solution; chip-to-wafer bonding; chip-to-wafer self-assembly; conventional chip-to-wafer 3D integration; direct chip bonding; driving force; known good dies; liquid surface tension; pick-and-place chip assembly; production throughput; production yield; self-assembly conditions; thermal compression; Accuracy; Bonding; Self-assembly; Silicon; Surface tension; Three dimensional displays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
3D Systems Integration Conference (3DIC), 2010 IEEE International
Conference_Location :
Munich
Print_ISBN :
978-1-4577-0526-7
Type :
conf
DOI :
10.1109/3DIC.2010.5751436
Filename :
5751436
Link To Document :
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