• DocumentCode
    1754185
  • Title

    Monolithic 3D integration of SRAM and image sensor using two layers of single grain silicon

  • Author

    Golshani, Negin ; Derakhshandeh, Jaber ; Ishihara, Ryoichi ; Beenakker, C.I.M. ; Robertson, Michael ; Morrison, Thomas

  • Author_Institution
    Delft Inst. of Microsyst. & Nanoelectron. (DIMES), Tech. Univ. Delft, Delft, Netherlands
  • fYear
    2010
  • fDate
    16-18 Nov. 2010
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this paper we report the monolithic integration of two single grain silicon layers for SRAM and image sensor applications. A 12 × 28 silicon lateral photodiode array with a 25_μm pixel size prepared on top of a three transistor readout circuit with individual outputs for every pixel is demonstrated. 6T SRAM cells with two layers of stacked transistors were prepared to compare the performance and area of each cell in different configurations.
  • Keywords
    SRAM chips; elemental semiconductors; image sensors; monolithic integrated circuits; photodiodes; readout electronics; silicon; transistor circuits; SRAM cells; image sensor; monolithic 3D integration; monolithic integration; silicon lateral photodiode array; single grain silicon layers; stacked transistors; transistor readout circuit; Logic gates; MOSFETs; Photodiodes; Pixel; Random access memory; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    3D Systems Integration Conference (3DIC), 2010 IEEE International
  • Conference_Location
    Munich
  • Print_ISBN
    978-1-4577-0526-7
  • Type

    conf

  • DOI
    10.1109/3DIC.2010.5751441
  • Filename
    5751441
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1754185