Title :
A successful implementation of dual damascene architecture to copper TSV for 3D high density applications
Author :
Farhane, Rebha El ; Assous, Myriam ; Leduc, Patrick ; Thuaire, Aurélie ; Bouchu, David ; Feldis, Héléne ; Sillon, Nicolas
Author_Institution :
LETI/MINATEC, CEA, Grenoble, France
Abstract :
Dual damascene integration was applied to High Density Through Silicon Vias in order to provide a low-cost TSV process. The architecture was developed for 3 μm-width and 20 μm-height vias to fit electrical and morphological requirements. Electrical results show the manufacturability of the process (>;95% yield). Using LETI internal cost model, we estimate a cost reduction of 23% compared to single damascene Redistribution Layer.
Keywords :
copper; cost reduction; three-dimensional integrated circuits; 3D high density application; LETI internal cost model; copper through silicon vias; cost reduction; dual damascene architecture; electrical requirement; morphological requirement; Bonding; Copper; Lithography; Resistance; Silicon; Through-silicon vias; Tin;
Conference_Titel :
3D Systems Integration Conference (3DIC), 2010 IEEE International
Conference_Location :
Munich
Print_ISBN :
978-1-4577-0526-7
DOI :
10.1109/3DIC.2010.5751445
