DocumentCode
1754212
Title
Statistical approach in a system level methodology to deal with process variation
Author
Pineda, Concepción Sanz ; Prieto, Manuel ; Gómez, José Ignacio ; Tenllado, Christian ; Catthoor, Francky
Author_Institution
Dipt. de Arquitectura de Comput. y Autom., Univ. Complutense de Madrid, Madrid, Spain
fYear
2010
fDate
24-29 Oct. 2010
Firstpage
115
Lastpage
124
Abstract
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of both energy consumption and performance. In this context, developing variation aware design methodologies becomes a must. These techniques should provide better performance-energy balances while the percentage of faulty products keeps controlled. Furthermore, it would be advisable to consider adaptations of the system during lifetime, in order to provide robustness against ageing. In this paper we propose a design approach which tackles process variation on the memory system by using multimode memories. At design time we perform a heuristic exploration using probabilistic models of these memories, which generates a set of system configurations that minimize energy consumption for a given set of timing constraints. The percentage of systems that will satisfy these deadlines, even under process variation, is taken as a design parameter. Additionally, if system monitors are available, a setup stage optimizes the initial set of configurations for the actual memory parameters. Our simulations show that this methodology provides significant energy savings while still meeting timing constraints.
Keywords
digital storage; integrated circuit design; statistical analysis; energy consumption; heuristic exploration; memory system; multimode memories; probabilistic models; process variation; statistical approach; system level methodology; variation aware design methodologies; Delay; Design methodology; Energy consumption; Memory management; Monitoring; Temperature measurement; Process variation; parametric yield; variability compensation;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2010 IEEE/ACM/IFIP International Conference on
Conference_Location
Scottsdale, AZ
Print_ISBN
978-1-6055-8905-3
Type
conf
Filename
5751490
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