DocumentCode :
1755158
Title :
Built-In Self-Test of Transmitter I/Q Mismatch and Nonlinearity Using Self-Mixing Envelope Detector
Author :
Nassery, Afsaneh ; Byregowda, Srinath ; Ozev, Sule ; Verhelst, Marian ; Slamani, Mustapha
Author_Institution :
Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA
Volume :
23
Issue :
2
fYear :
2015
fDate :
Feb. 2015
Firstpage :
331
Lastpage :
341
Abstract :
Built-in self-test (BiST) for transmitters is a desirable choice since it eliminates the reliance on expensive instrumentation to perform radio-frequency signal analysis. Existing on-chip resources, such as power or envelope detectors or small additional circuitry, can be used for BiST purposes. However, due to limited bandwidth, measurement of complex specifications, such as in-phase and quadrature (IQ) imbalance, and third-order intermodulation intercept point (IIP3) is challenging. Since IQ imbalances are most amenable for digital compensation, their characterization and monitoring are desirable. In this paper, we propose a multistep BiST technique for transmitter IQ imbalance and nonlinearity using a self-mixing envelope detector. We derive analytical expressions for the output signal in linear and nonlinear modes. Using linear mode expression, we devise test signals to isolate the effects of gain and phase imbalances, dc offsets, and time skews from other parameters of the system in low-power mode. Once isolated, these parameters are calculated easily with a few mathematical operations. In the next step, using a higher power test signal, the nonlinear behavior of the transmitter is excited and the IIP3 of the transmitter is computed based on the analytical expressions. Simulations and hardware measurements show that the technique can provide accurate characterization of the path.
Keywords :
built-in self test; integrated circuit testing; intermodulation; nonlinear distortion; radio transmitters; radiofrequency integrated circuits; built-in self-test; circuit nonlinearity; in-phase/quadrature imbalance; nonlinear mode; radio frequency signal analysis; self-mixing envelope detector; third-order intermodulation intercept point; transmitter I/Q mismatch; Computational modeling; Detectors; Equations; Integrated circuit modeling; Mathematical model; Radio frequency; Transmitters; Built-in self-test (Bist); envelope detector; in-phase and quadrature (IQ) imbalance; third-order intercept point (IIP3); third-order intercept point (IIP3).;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2308317
Filename :
6851946
Link To Document :
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