• DocumentCode
    1756340
  • Title

    Challenges and advances in Toffoli network optimisation

  • Author

    Dueck, Gerhard W.

  • Author_Institution
    Fac. of Comput. Sci., Univ. of New Brunswick, Fredericton, NB, Canada
  • Volume
    8
  • Issue
    4
  • fYear
    2014
  • fDate
    41821
  • Firstpage
    172
  • Lastpage
    177
  • Abstract
    This study gives a brief overview of the current trends in reversible logic synthesis with emphasis on template matching. The basic building block for reversible circuits considered here is the multiple-control Toffoli gate. Some approaches to synthesis are reviewed and the challenges are explained. Since many practical functions are not reversible, they must be embedded into reversible ones, if they are to be implemented using reversible logic. The complexity of such embeddings is expounded. A two phase synthesis is described where particular attention is devoted to the optimisation phase via template matching. Insights into the properties of the templates, have led to algorithms that aid the generation of templates. Until recently, the application of templates has been guided by different heuristics. A review of an exact template matching algorithm with a discussion of the implications of such an algorithm is given. Exact matching affects both the generation as well as the application of templates. Results from a prototype implementation are encouraging.
  • Keywords
    circuit optimisation; logic design; logic gates; pattern matching; Toffoli network optimisation; exact template matching algorithm; multiple-control Toffoli gate; reversible circuits; reversible logic; reversible logic synthesis; template generation; two phase synthesis;
  • fLanguage
    English
  • Journal_Title
    Computers & Digital Techniques, IET
  • Publisher
    iet
  • ISSN
    1751-8601
  • Type

    jour

  • DOI
    10.1049/iet-cdt.2013.0055
  • Filename
    6853133