DocumentCode
1756527
Title
Real-Time Visual Saliency Architecture for FPGA With Top-Down Attention Modulation
Author
Barranco, Francisco ; Diaz, J. ; Pino, Begona ; Ros, Eduardo
Author_Institution
Dept. of Comput. Archit. & Technol., Univ. of Granada, Granada, Spain
Volume
10
Issue
3
fYear
2014
fDate
Aug. 2014
Firstpage
1726
Lastpage
1735
Abstract
Biological vision uses attention to reduce the visual bandwidth simplifying the higher-level processing. This paper presents a model and its hardware real-time architecture in a field programmable gate array (FPGA) to be integrated in a robotic system that emulates this powerful biological process. It is based on the combination of bottom-up saliency and top-down task-dependent modulation. The bottom-up stream is deployed including local energy, orientation, color opponencies, and motion maps. The most novel part of this work is the saliency modulation by two high-level features: 1) optical flow and 2) disparity. Furthermore, the influence of the features may be adjusted depending on the application. The proposed system reaches 180 fps for 640 × 480 resolution. Finally, an example shows its modulation potential for driving assistance systems.
Keywords
embedded systems; field programmable gate arrays; image sequences; real-time systems; FPGA; bottom-up saliency; driving assistance systems; field programmable gate array; hardware real-time architecture; optical flow; real-time visual saliency architecture; robotic system; saliency modulation; top-down attention modulation; top-down task-dependent modulation; Computer architecture; Hardware; Image color analysis; Informatics; Modulation; Optical imaging; Visualization; Embedded systems; field programmable gate arrays (FPGA); real-time systems; saliency; visual attention;
fLanguage
English
Journal_Title
Industrial Informatics, IEEE Transactions on
Publisher
ieee
ISSN
1551-3203
Type
jour
DOI
10.1109/TII.2014.2319581
Filename
6804684
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