DocumentCode
1756991
Title
Correction to "Complimentary polarizers STT-MRAM (CPSTT) for on-chip caches" [Feb 13 232-234]
Author
Fong, Xuanyao ; Roy, Kaushik
Author_Institution
Department of Electrical and Computer Engineering, Purdue University, West Lafayette, USA
Volume
34
Issue
4
fYear
2013
fDate
41365
Firstpage
562
Lastpage
562
Abstract
There was a typographical error in the title of the above-named paper [ibid., vol. 34, no. 2, pp. 232-234, Feb. 2013]. It should have been "Complementary Polarizers STT-MRAM (CPSTT) for On-Chip Caches" The same error also appears in the abbreviated title on page 233 and in the last sentence of Section I. The sentence should be We propose an STT-MRAM structure with complementary polarizers (CPSTT) that has symmetric write currents (to save write power) and self-referencing differential read (to reduce read access failures and read access delays).
Keywords
Cache storage; Circuit simulation; Delays; System-on-chip;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2013.2249611
Filename
6479231
Link To Document