DocumentCode :
1757047
Title :
Film-Profile Engineered InGaZnO Thin-Film Transistors With Self-Aligned Bottom Gates
Author :
Bo-Shiuan Shie ; Horng-Chih Lin ; Tiao-Yuan Huang
Author_Institution :
Dept. of Electron. EngineeringInstitute of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
36
Issue :
8
fYear :
2015
fDate :
Aug. 2015
Firstpage :
787
Lastpage :
789
Abstract :
We propose and demonstrate a method which combines film profile engineering (FPE) and a procedure of forming self-aligned bottom gates (SABGs) to fabricate InGaZnO thin-film transistors (TFTs). In the scheme, an ingenious etching procedure was implemented to form the final bottom gate self-aligned to the upper hardmask structure. The fabricated SABG devices show greatly reduced OFF-state leakage as compared with nonself-aligned ones, attributing to the reduction of gate-to-source/drain overlap areas which lowers both parasitic capacitance and gate leakage current. These merits benefit the operation of circuits consisted of TFTs implemented with FPE.
Keywords :
etching; leakage currents; masks; thin film transistors; wide band gap semiconductors; FPE; InGaZnO; SABG device; TFT; etching procedure; film-profile engineered thin-film transistors; gate leakage current; hardmask structure; parasitic capacitance; self-aligned bottom gates; Etching; Fabrication; Leakage currents; Logic gates; Metals; Performance evaluation; Thin film transistors; Film profile engineering; InGaZnO; metal oxide; self-aligned; thin-film transistor;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2015.2442275
Filename :
7119561
Link To Document :
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