• DocumentCode
    1757859
  • Title

    Design of Safe Two-Wire Interface-Driven Chip-Scale Neurostimulator for Visual Prosthesis

  • Author

    Jung, Louis H. ; Shany, Nitzan ; Emperle, Alexander ; Lehmann, T. ; Byrnes-Preston, Phil ; Lovell, Nigel H. ; Suaning, Gregg J.

  • Author_Institution
    Grad. Sch. of Biomed. Eng., Univ. of New South Wales, Sydney, NSW, Australia
  • Volume
    48
  • Issue
    9
  • fYear
    2013
  • fDate
    Sept. 2013
  • Firstpage
    2217
  • Lastpage
    2229
  • Abstract
    Visual prostheses with a high number of electrodes are now of great research interest driven by the successful recent clinical trials. High channel devices are confronted with numerous challenges many of which can be addressed by adopting a multi-implant architecture. However now the difficulties lie in ensuring safety of the inter-implant interface by addressing the associated risks, often neglected in the past. This paper presents a multi-implant architecture-based 98-channel neurostimulator with an inter-implant interface consisting only of two wires, carrying both power and semi-duplex data. The interface is ac-coupled both to prevent high levels of dc current in the presence of insulation failures and to maintain a charge-balanced interface. The interface is also monitored within the stimulator itself for added means of safety. The stimulator is fabricated using a 0.35-μm HVCMOS technology and occupies 4.9 × 4.9 mm2 without any external discrete components, making it suitable for a chip-scale packaging.
  • Keywords
    CMOS integrated circuits; biomedical electronics; electrodes; integrated circuit packaging; neurophysiology; prosthetics; 98-channel neurostimulator; HVCMOS technology; associated risks; chip-scale packaging; electrodes; high channel devices; multiimplant architecture; semiduplex data; two-wire interface-driven chip-scale neurostimulator; visual prosthesis; Electrodes; Implants; MOSFET; Safety; Switches; Wires; Neuro-stimulator; split architecture; visual prosthesis;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2013.2264136
  • Filename
    6525504