Author_Institution :
Dept. of Electron. Eng., Feng Chia Univ., Taichung, Taiwan
Abstract :
In this paper, a high-current self-aligned double-channel polycrystalline silicon thin-film transistor (SA-DCTFT) is proposed, demonstrated, and analyzed. This self-aligned device, which includes two channels, a nitride spacer, two offset-gated structures, and a raised source/drain (RSD) region, reveals better device performance. In addition, the top and bottom channels of the proposed device are self-aligned, and no extra mask is needed as compared with the conventional double-channel devices. Our experimental results show that the on-current of the SA-DCTFT is about twice higher than that of the conventional structure, and the leakage current and kink effect are considerably reduced simultaneously. Moreover, the device stability, such as threshold voltage shift and current degradation under a high gate bias, is enhanced by the proposed self-aligned double channels, nitride spacer, offset-gated structures, and RSD design. The lower drain electric field of the SA-DCTFT is also benefitted to the device scaling down for better performance.
Keywords :
elemental semiconductors; silicon; thin film transistors; RSD region; current degradation; device stability; drain electric field; gate bias; high-current SA-DCTFT; kink effect; leakage current; nitride spacer; offset-gated structures; raised source-drain region; self-aligned device; self-aligned double-channel polysilicon thin-film transistor; threshold voltage shift; Leakage current; Logic gates; Performance evaluation; Silicon; Thin film transistors; Double channels; polycrystalline silicon (poly-Si) thin-film transistor (TFT) (poly-Si TFT); raised source/drain (S/D) (RSD); self-aligned;
