DocumentCode :
1758940
Title :
Power distribution network design with split and merged power rails
Author :
Li Wern Chew
Author_Institution :
Intel Archit. Group (IAG), Intel Microelectonics (M) Sdn. Bhd., Bayan Lepas, Malaysia
Volume :
8
Issue :
4
fYear :
2014
fDate :
41821
Firstpage :
246
Lastpage :
251
Abstract :
In a power distribution network design, it is always desirable to have a clean, undistorted power supply from the voltage source to each of the functional blocks in a microprocessor in order for the chip to function properly. Although a large individual power rails supply is generally preferred, it is usually not feasible in a real-world design due to form factor limitation and cost constraint. Power rails merging not only allows the option for decoupling capacitors sharing, but also reduces the number of voltage sources needed in the designed system. However, by merging power rails, coupling noise is generated between the functional blocks that share the same voltage source. In this study, a study on power rails merger option is carried out based on two aspects: the load current characteristics and the power noise tolerances of the functional blocks being merged.
Keywords :
distribution networks; microprocessor chips; power capacitors; power supply quality; decoupling capacitors; load current characteristics; merged power rails; microprocessor; power distribution network; power noise tolerances; power rails supply; split power rails; undistorted power supply; voltage sources;
fLanguage :
English
Journal_Title :
Circuits, Devices & Systems, IET
Publisher :
iet
ISSN :
1751-858X
Type :
jour
DOI :
10.1049/iet-cds.2013.0197
Filename :
6855504
Link To Document :
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