DocumentCode
1759281
Title
A Fault Analysis Perspective for Testing of Secured SoC Cores
Author
Ali, Sk Subidh ; Mazumdar, Bodhisatwa ; Mukhopadhyay, Debdeep
Author_Institution
Eng. Dept., New York Univ. Abu Dhabi, Abu Dhabi, United Arab Emirates
Volume
30
Issue
5
fYear
2013
fDate
Oct. 2013
Firstpage
63
Lastpage
73
Abstract
Can the inputs of a cryptocore be stressed to leak the secret key? This article demonstrates such a vulnerability challenging secure integration of these cores in a system-on-chip design.
Keywords
cryptography; integrated circuit design; integrated circuit reliability; system-on-chip; cryptocore; fault analysis perspective; secret key; secured SoC core testing; system-on-chip design; vulnerability-challenging secure integration; Algorithm design and analysis; Circuit faults; Doped fiber amplifiers; Fault diagnosis; Field programmable gate arrays; Mathematical model; System-on-chip; AES; AES key schedule; Differential Fault Analysis; Fault Model; SoC;
fLanguage
English
Journal_Title
Design & Test, IEEE
Publisher
ieee
ISSN
2168-2356
Type
jour
DOI
10.1109/MDAT.2013.2252951
Filename
6480791
Link To Document