• DocumentCode
    1759352
  • Title

    Double Counting in 2^{t} -ary RSA Precomputation Reveals the Secret Exponent

  • Author

    Kaminaga, Masahiro ; Yoshikawa, Hideki ; Suzuki, Toshinori

  • Author_Institution
    Dept. of Electr. Eng. & Inf. Technol., Tohoku Gakuin Univ., Tagajo, Japan
  • Volume
    10
  • Issue
    7
  • fYear
    2015
  • fDate
    42186
  • Firstpage
    1394
  • Lastpage
    1401
  • Abstract
    A new fault attack, double counting attack (DCA), on the precomputation of 2t-ary modular exponentiation for a classical RSA digital signature (i.e., RSA without the Chinese remainder theorem) is proposed. The 2t-ary method is the most popular and widely used algorithm to speed up the RSA signature process. Developers can realize the fastest signature process by choosing optimum t . For example, t=6 is optimum for a 1536-bit classical RSA implementation. The 2t-ary method requires precomputation to generate small exponentials of message. Conventional fault attack research has paid little attention to precomputation, even though precomputation could be a target of a fault attack. The proposed DCA induces faults in precomputation using instruction skip technique, which is equivalent to replacing an instruction with a no operation in assembly language. This paper also presents a useful position checker tool to determine the position of the 2t-ary coefficients of the secret exponent from signatures based on faulted precomputations. The DCA is demonstrated to be an effective attack method for some widely used parameters. DCA can reconstruct an entire secret exponent using the position checker with 63=26-1) faulted signatures in a short time for a 1536-bit RSA implementation using the2t-ary method. The DCA process can be accelerated for a small public exponent (e.g., 65537). To the best of our knowledge, the proposed DCA is the first fault attack against classical RSA precomputation.
  • Keywords
    cryptography; 2t-ary RSA precomputation; 2t-ary modular exponentiation; DCA; RSA signature process; double counting attack; instruction skip technique; Coprocessors; Cryptography; Digital signatures; Microcontrollers; Random access memory; Registers; Timing; Differential Fault Analysis; Double Counting Attack; RSA; Side-channel Attack; Side-channel attack; differential fault analysis; double counting attack;
  • fLanguage
    English
  • Journal_Title
    Information Forensics and Security, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1556-6013
  • Type

    jour

  • DOI
    10.1109/TIFS.2015.2411213
  • Filename
    7056501