DocumentCode :
1759449
Title :
A Simple and Direct Dead-Time Effect Compensation Scheme in PWM-VSI
Author :
Dong-Hee Lee ; Jin-Woo Ahn
Author_Institution :
Dept. of Mechatron. Eng., Kyungsung Univ., Busan, South Korea
Volume :
50
Issue :
5
fYear :
2014
fDate :
Sept.-Oct. 2014
Firstpage :
3017
Lastpage :
3025
Abstract :
This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper.
Keywords :
PWM invertors; compensation; harmonic analysis; sampling methods; SVPWM switching interval error; current polarity; dc-link voltage; direct compensation technique; direct dead-time effect; gate drive; nonlinear voltage distortion; output voltage harmonics; pulsewidth modulation voltage source inverter; sampling period; space vector PWM; three-phase PWM-VSI; time delay; voltage vectors; Inverters; Logic gates; Space vector pulse width modulation; Switches; Vectors; Voltage control; Dead-time compensation; direct compensation of switching intervals; pulsewidth-modulation voltage-source inverter (PWM-VSI);
fLanguage :
English
Journal_Title :
Industry Applications, IEEE Transactions on
Publisher :
ieee
ISSN :
0093-9994
Type :
jour
DOI :
10.1109/TIA.2014.2303932
Filename :
6734679
Link To Document :
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