DocumentCode :
1759616
Title :
1-V 365- \\mu{\\rm W} 2.5-MHz Channel Selection Filter for 3G Wireless Receiver in 55-nm CMOS
Author :
Tien-Yu Lo ; Chi-Hsiang Lo
Author_Institution :
MediaTek Inc., Hsinchu, Taiwan
Volume :
22
Issue :
5
fYear :
2014
fDate :
41760
Firstpage :
1164
Lastpage :
1169
Abstract :
This paper presents a novel 1-V 2.5-MHz continuous-time filter for 3G wireless application, fabricated using a standard 55-nm CMOS process. The four-pole filter topology includes a single pole-tracking Operational Amplifier (OPAMP) structure to achieve low in-band noise levels, high out-of-band linearity, and reduced power consumption. An automatic frequency tuning circuit is developed to compensate for process and environmental variations. The proposed filter achieves inband noise of 18-μV rms and out-of-band IIP3 of 33 dBm within 365 μW. The out-of-band spurious-free dynamic range is measured at 76.7 dB, resulting in a figure-of-merit of 1.24 × 10-4 fJ.
Keywords :
3G mobile communication; CMOS integrated circuits; continuous time filters; radio receivers; radiofrequency integrated circuits; 3G wireless receiver; CMOS process; OPAMP; automatic frequency tuning circuit; channel selection filter; continuous-time filter; figure-of-merit; four-pole filter topology; frequency 2.5 MHz; high out-of-band linearity; low in-band noise levels; power 365 muW; reduced power consumption; single pole-tracking operational amplifier structure; size 55 nm; spurious-free dynamic range; voltage 1 V; Dynamic range (DR); filter; out-of-band IIP3; spurious-free dynamic range (SFDR); spurious-free dynamic range (SFDR).;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2013.2260187
Filename :
6527353
Link To Document :
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