A 220–285 GHz SPDT Switch in 65-nm CMOS Using Switchable Resonator Concept

The paper reports a single-pole double-throw (SPDT) switch operating from 220 to 285 GHz in 65-nm bulk CMOS. The switchable resonator concept by using three coupled-lines topology is proposed and adopted in the switch design. Equivalent circuit models are introduced for analyzing the operation mechanism of proposed switch. The fabricated SPDT switch features measured insertion loss of 4.2 dB including RF pad losses, isolation of 19 dB, return loss of better than 10 dB, simulated P1 dB of 9.2 dBm, and zero power consumption. To the best of authors´ knowledge, this switch achieves the highest operating frequency and smallest chip size among reported SPDT switches in CMOS and BiCMOS technologies.