Title :
Regaining Trust in VLSI Design: Design-for-Trust Techniques
Author :
Rajendran, Jeyavijayan ; Sinanoglu, Ozgur ; Karri, Ramesh
Author_Institution :
Electr. & Comput. Eng. Dept., New York Univ., New York, NY, USA
Abstract :
Designers use third-party intellectual property (IP) cores and outsource various steps in their integrated circuit (IC) design flow, including fabrication. As a result, security vulnerabilities have been emerging, forcing IC designers and end-users to reevaluate their trust in hardware. If an attacker gets hold of an unprotected design, attacks such as reverse engineering, insertion of malicious circuits, and IP piracy are possible. In this paper, we shed light on the vulnerabilities in very large scale integration (VLSI) design and fabrication flow, and survey design-for-trust (DfTr) techniques that aim at regaining trust in IC design. We elaborate on four DfTr techniques: logic encryption, split manufacturing, IC camouflaging, and Trojan activation. These techniques have been developed by reusing VLSI test principles.
Keywords :
VLSI; cryptography; integrated circuit design; logic circuits; microprocessor chips; reverse engineering; DfTr techniques; IP cores; IP piracy; VLSI design; design-for-trust techniques; integrated circuit camouflaging; integrated circuit design flow; logic encryption; malicious circuits; regaining trust; reverse engineering; security vulnerabilities; split manufacturing; third-party intellectual property cores; trojan activation; unprotected design; very large scale integration design; Design methodology; Encryption; Hardware; Integrated circuit modeling; Logic gates; Very large scale integration; Design automation; design for testability; security;
Journal_Title :
Proceedings of the IEEE
DOI :
10.1109/JPROC.2014.2332154