DocumentCode :
1760124
Title :
Degradation of Polycrystalline Silicon TFT CMOS Inverters under AC Operation
Author :
Chen, Wei ; Wang, Mingxiang ; Zhou, Yan ; Wong, Man
Author_Institution :
Dept. of Microelectron., Soochow Univ., Suzhou, China
Volume :
60
Issue :
1
fYear :
2013
fDate :
Jan. 2013
Firstpage :
295
Lastpage :
300
Abstract :
Degradation of polycrystalline silicon (poly-Si) thin-film transistor (TFT)-based CMOS inverters under AC operation is studied. Based on a previous drain current model of poly-Si TFTs including the kink effect, the voltage transfer characteristics of both fresh and stressed inverters are well described. It is determined that hot carrier of the n-TFT and negative bias temperature instability of the p-TFT are competing degradation mechanisms controlling the observed two-stage degradation of the inverter. Based on such mechanisms, degradation of inverter under various AC operation conditions can be qualitatively predicted. It is found that under given frequency and amplitude of the input pulse voltage, inverter´s degradation can still be effectively suppressed by increasing the pulse falling time, and/or decreasing the low voltage duration.
Keywords :
CMOS integrated circuits; elemental semiconductors; negative bias temperature instability; silicon; thin film transistors; AC operation; Si; TFT CMOS inverter; drain current model; hot carrier; kink effect; n-TFT; negative bias temperature instability; p-TFT; poly-Si thin-film transistor; polycrystalline silicon; pulse voltage; voltage transfer characteristic; CMOS integrated circuits; Degradation; Inverters; Silicon; Stress; Temperature measurement; Thin film transistors; hot carrier (HC); inverter; negative bias temperature instability (NBTI); polycrystalline silicon (poly-Si); voltage transfer characteristics (VTC);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2012.2228865
Filename :
6384729
Link To Document :
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