Title :
Auto-Scaling Overdrive Method Using Adaptive Charge Amplification for PRAM Write Performance Enhancement
Author :
Sukhwan Choi ; Hyun-Sik Kim ; Seungchul Jung ; Si-Duk Sung ; Young-Sub Yuk ; Hyuck-Sang Yim ; Yoonjae Shin ; Jun-Ho Cheon ; Changyong Ahn ; Taekseung Kim ; Kim, Young Bae ; Gyu-Hyeong Cho
Author_Institution :
Dept. of Electr. Engneering, Korea Adv. Inst. of Sci. & Technol.(KAIST), Daejeon, South Korea
Abstract :
A PRAM write driver with an auto-scaling overdrive method is presented. The proposed overdrive method significantly reduces the rise time of the cell-current pulse for bit-line parasitic components of 3 pF and 6 k Ω, and it lowers the complexity of the overdrive control using an adaptive charge amplification technique. A rise time of less than 15 ns is achieved and shortened up to 4.7 times, and the total write-throughput is increased. The rise time is reduced consistently for all levels of the target-current by the auto-scaling effect. Therefore, cell heating control becomes more linear in program-and-verify (PNV) operation. Due to its simple adding-on structure, it is easily compatible with a conventional write driver. A prototype chip was implemented using a 0.18- μm CMOS process. It is also applicable to smaller-scale technology.
Keywords :
CMOS memory circuits; phase change memories; random-access storage; CMOS; PRAM write driver; PRAM write performance enhancement; adaptive charge amplification; auto-scaling overdrive method; bit-line parasitic components; capacitance 3 pF; cell heating control; overdrive control; program-and-verify operation; resistance 6 kohm; size 0.18 mum; Capacitance; Capacitors; Computer architecture; Mirrors; Phase change random access memory; Resistance; Scalability; Multi-level cell (MLC); overdrive; phase change random access memory (PRAM); phase-change memory; program-and-verify (PNV); write driver;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2014.2334813