DocumentCode
1760452
Title
A Low Phase Noise Oscillator Principled on Transformer-Coupled Hard Limiting
Author
Visweswaran, Akshay ; Staszewski, Robert Bogdan ; Long, John R.
Author_Institution
DIMES, Delft Univ. of Technol., Delft, Netherlands
Volume
49
Issue
2
fYear
2014
fDate
Feb. 2014
Firstpage
373
Lastpage
383
Abstract
Reduced phase noise conversion in a monolithic oscillator suitable for basestation applications is realized by hard limiting and subsequently restoring the resonating waveform. Overdriven transistors hard limit the drain voltage swing and it is shown analytically that this desensitizes the oscillation phase to circuit noise. A pair of tuned, 1:2 step-up transformers in the feedback path restore the fundamental frequency component with sufficient gain to overdrive the transistors forming the oscillator core, with greater selectivity than an equivalent LC tank. The 8 GHz, 65 nm CMOS oscillator prototype targeting the GSM-900 base-station specification consumes 32 mA from 1.5 V. Normalized to 915 MHz, the phase noise measured at 1 MHz offset is -147.7 dBc/Hz, validating predictions from theory and simulation. The measured frequency pushing is less than 16 MHz/V.
Keywords
CMOS integrated circuits; MMIC oscillators; field effect MMIC; phase noise; transformers; CMOS oscillator prototype; GSM-900 base-station; LC tank; circuit noise; current 32 mA; drain voltage swing; frequency 8 GHz; frequency 915 MHz; low phase noise oscillator; monolithic oscillator; phase noise conversion; size 65 nm; step-up transformers; transformer-coupled hard limiting; voltage 1.5 V; Approximation methods; Logic gates; Phase noise; Sensitivity; Transistors; Base station (BTS); CMOS oscillator; DCS 1800; GSM 900; frequency pushing; gate overdrive; hard limiting; impulse sensitivity function (ISF); low phase noise; phase noise; transformer-coupled;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2013.2285375
Filename
6665145
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