DocumentCode :
1760559
Title :
Use of Commercial FPGA-Based Evaluation Boards for Single-Event Testing of DDR2 and DDR3 SDRAMs
Author :
Ladbury, Raymond L. ; Berg, Melanie D. ; Wilcox, Edward P. ; LaBel, Kenneth A. ; Kim, Hak S. ; Phan, Anthony M. ; Seidleck, Christina M.
Author_Institution :
NASA Goddard Space Flight Center, Greenbelt, MD, USA
Volume :
60
Issue :
6
fYear :
2013
fDate :
Dec. 2013
Firstpage :
4457
Lastpage :
4463
Abstract :
The speed, tight timing requirements packaging and complicated error behavior of DDR2 and DDR3 SDRAMs pose significant challenges for single-event testing. Often, each new generation will require an expensive new tester with a state-of-the-art controller for the memory. We explore the trade-offs in the use of commercial FPGA based evaluation boards for radiation testing DDR2 and DDR3 SDRAMs. We evaluate the resulting data quality and discuss tester performance while also elucidating and comparing SEE susceptibilities in DDR2 and DDR3 SDRAMs.
Keywords :
DRAM chips; field programmable gate arrays; integrated circuit testing; radiation hardening (electronics); DDR2 SDRAMs; DDR3 SDRAMs; FPGA-based evaluation boards; complicated error behavior; data quality; radiation testing; single-event testing; Field programmable gate arrays; Quality assurance; Radiation effects; Radiation hardening (electronics); Reliability; Risk management; SDRAM; Probabilistic risk assessment; quality assurance; radiation effects in ICs; radiation hardness assurance; reliability estimation; testing techniques;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2013.2285517
Filename :
6665158
Link To Document :
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