Magnetically Isolated Gate Driver With Leakage Inductance Immunity

Author

Muhammad, Khairul Safuan ; Lu, Dylan Dah-Chuan

Author_Institution

Sch. of Electr. & Inf. Eng., Univ. of Sydney, Sydney, NSW, Australia

Volume

29

Issue

4

fYear

2014

fDate

41730

Firstpage

1567

Lastpage

1572

Abstract

This letter presents the design of a magnetically isolated gate driver with high immunity to leakage inductance. The proposed gate driver (PGD) is developed based on a bipolar totem-pole gate driver (noninverting) located on the secondary side of the coupling transformer. It is able to drive a MOSFET/IGBT from standard CMOS to TTL output and down to LSTTL level. It also achieves large duty cycle ratio and small input to output delay and provides reliable isolation. In this letter, the PGD is analyzed and verified experimentally. The design guidelines are also provided including design considerations.

Keywords

CMOS integrated circuits; MOSFET; driver circuits; insulated gate bipolar transistors; low-power electronics; transformers; IGBT; LSTTL level; MOSFET; PGD; bipolar totem-pole gate driver; coupling transformer; design considerations; design guidelines; duty cycle ratio; leakage inductance immunity; low-power Schottky transistor-transistor logic; magnetically isolated gate driver; standard CMOS; Capacitors; Circuit faults; Couplings; Inductance; Logic gates; Resistors; Switches; Bipolar totem-pole; coupled inductor; isolated gate driver; leakage inductance immunity; low-power Schottky transistor–transistor logic (LSTTL);

fLanguage

English

Journal_Title

Power Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0885-8993

Type

jour

DOI

10.1109/TPEL.2013.2279548

Filename

6585764