• DocumentCode
    1761077
  • Title

    Experiences in Digital Circuit Design Courses: A Self-Study Platform for Learning Support

  • Author

    Bañeres, David ; Clariso, Robert ; Jorba, Josep ; Serra, Montse

  • Author_Institution
    Comput. Sci., Multimedia & Telecommun. Dept., Univ. Oberta de Catalunya, Barcelona, Spain
  • Volume
    7
  • Issue
    4
  • fYear
    2014
  • fDate
    Oct.-Dec. 1 2014
  • Firstpage
    360
  • Lastpage
    374
  • Abstract
    The synthesis of digital circuits is a basic skill in all the bachelor programmes around the ICT area of knowledge, such as Computer Science, Telecommunication Engineering or Electrical Engineering. An important hindrance in the learning process of this skill is that the existing educational tools for the design of circuits do not allow the student to validate if his design satisfies the specification. Furthermore, an automatic feedback is essential in order to help students to fix incorrect designs. In this paper, we propose an online platform where the students can design and verify their circuits with an individual and automatic feedback. The technical aspects of the platform and the designed verification tool are presented. The impact of the platform on the learning process of the students is illustrated by analyzing the student performance on the course where the platform has been used. Results on the utilization of the platform versus the success rate and marks in the final exam are presented and compared with previous semesters.
  • Keywords
    computer science education; digital circuits; educational courses; telecommunication engineering education; automatic feedback; bachelor programmes; computer science; digital circuit design courses; educational tools; electrical engineering; individual feedback; learning support; online platform; self-study platform; student learning process; student performance; telecommunication engineering; Circuit synthesis; Computational modeling; Digital circuits; Integrated circuit modeling; Logic gates; Digital circuit design; automatic assessment; e-learning; formal verification; model checking;
  • fLanguage
    English
  • Journal_Title
    Learning Technologies, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1939-1382
  • Type

    jour

  • DOI
    10.1109/TLT.2014.2320919
  • Filename
    6807698