DocumentCode
1761392
Title
Mixed-Mode Analysis of Different Mode Silicon Nanowire Transistors-Based Inverter
Author
Juncheng Wang ; Gang Du ; Kangliang Wei ; Kai Zhao ; Lang Zeng ; Xing Zhang ; Xiaoyan Liu
Author_Institution
Key Lab. of Microelectron. Devices & Circuits, Peking Univ., Beijing, China
Volume
13
Issue
2
fYear
2014
fDate
41699
Firstpage
362
Lastpage
367
Abstract
In this paper, we focused on the comparison and analysis of the performance of inversion-mode (IM), accumulation-mode (AM), and junctionless (JL) silicon nanowire field-effect transistors (NWTs)-based inverter. The effects of the radius, equivalent oxide thickness and source/drain doping in the different mode nanowire device structure are investigated. The capacitance components and transient characteristics, which determine the behavior of devices in the circuits, are studied and compared among different mode nanowire devices. The mixed-mode circuit simulations have been performed for the inverter circuit and three-stage ring oscillator consist of n-type and p-type IM/AM/JL NWTs. JL NWTs show lower Miller capacitance which contributes to suppressing the overshoot effect in the circuits. Results of these simulations can give insights into the in-circuit behavior of these future generation devices.
Keywords
elemental semiconductors; field effect transistors; invertors; nanowires; oscillators; semiconductor doping; silicon; Si; accumulation-mode silicon nanowire field-effect transistor-based inverter; capacitance component; different mode nanowire device structure; different mode silicon nanowire transistors-based inverter; inversion-mode silicon nanowire field-effect transistor-based inverter; junctionless silicon nanowire field-effect transistor-based inverter; lower Miller capacitance; mixed-mode circuit simulation analysis; n-type IM-AM-JL NWT; overshoot effect suppression; p-type IM-AM-JL NWT; radius equivalent oxide thickness; source-drain doping; three-stage ring oscillator; transient characteristics; Capacitance; Doping; Integrated circuit modeling; Inverters; Licenses; Logic gates; Silicon; Junctionless (JL); mixed-mode circuit simulation; nanowire; transistor;
fLanguage
English
Journal_Title
Nanotechnology, IEEE Transactions on
Publisher
ieee
ISSN
1536-125X
Type
jour
DOI
10.1109/TNANO.2014.2305577
Filename
6736109
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