Title :
Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays
Author :
Yu-Cheng Liao ; Hsin-Wei Pan ; Min-Che Hsieh ; Tzong-Sheng Chang ; Yu-Der Chih ; Ming-Jinn Tsai ; Chrong Jung Lin ; Ya-Chin King
Author_Institution :
Inst. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
In this paper, a fully logic compatible via diode is developed for high-density resistive random access memory (RRAM) array applications. This novel via diode is realized by advanced 28nm CMOS technology with Cu damascene via. The device is stacked between a top Cu via and a bottom Cu metal with a composite layer of TaN/TaON based dielectric film. An asymmetric current-voltage characteristic in this MIM structure provides a forward/reverse current ratio up to 106. In a cross-point RRAM array, the suppression of sneak current path by incorporating this via diode enables array size to be greatly expended. Via diode provides an excellent solution for high-density embedded nonvolatile memory applications in the nano-scale CMOS technology.
Keywords :
CMOS memory circuits; copper; dielectric materials; diodes; embedded systems; integrated circuit metallisation; nanoelectronics; random-access storage; tantalum compounds; three-dimensional integrated circuits; 3D cross-point RRAM arrays; Cu; MIM structure; RRAM array applications; TaN-TaON; asymmetric current-voltage characteristic; backend process; damascene via; dielectric film; forward-reverse current ratio; high-density embedded nonvolatile memory applications; high-density resistive random access memory; logic compatible via diode; nanoscale CMOS technology; size 28 nm; sneak current path; CMOS technology; Copper; Leakage currents; Nonvolatile memory; Random access memory; Advanced 28nm CMOS technology; cross-point; embedded nonvolatile memory; resistive random access memory; sneak current;
Journal_Title :
Electron Devices Society, IEEE Journal of the
DOI :
10.1109/JEDS.2014.2339296
