• DocumentCode
    1762023
  • Title

    Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models

  • Author

    Ke Huang ; Kupp, Nathan ; Xanthopoulos, Constantinos ; Carulli, John M. ; Makris, Yiorgos

  • Volume
    32
  • Issue
    1
  • fYear
    2015
  • fDate
    Feb. 2015
  • Firstpage
    53
  • Lastpage
    60
  • Abstract
    This paper presents statistical methods to identify and take advantage of correlations in the test methods and wafer-level spatial correlations among devices. The result, shown for industrial designs, is a far more optimized test suite.
  • Keywords
    analogue integrated circuits; integrated circuit testing; radiofrequency integrated circuits; analog-RFIC testing; industrial designs; inter-die correlation; intra-die correlation; statistical methods; wafer-level spatial correlations; Analog circuits; Computational modeling; Costs; Integrated circuit modeling; Mixed analog digital integrated circuits; Performance evaluation; Radio frequency; Semiconductor device modeling; Statistical analysis; System-on-chip; Adaptive test; alternate test; analog and RF test; joint correlation model; spatial correlation modeling;
  • fLanguage
    English
  • Journal_Title
    Design & Test, IEEE
  • Publisher
    ieee
  • ISSN
    2168-2356
  • Type

    jour

  • DOI
    10.1109/MDAT.2014.2361721
  • Filename
    6917034
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1762023