Title :
Pipelined ADC based design of bandpass ΔΣ-ADC
Author :
Sarma, V. ; Sahoo, Bibhudatta
Author_Institution :
Dept. of ECE, Amrita Univ., Kollam, India
Abstract :
A high-speed, large dynamic range fS/4 bandpass ΔΣ-modulator using a first-order error-feedback loop is proposed. The internal quantiser is realised using a high-speed pipelined ADC. Error feedback is achieved by exploiting the implicit latency in a pipelined ADC. The proposed architecture achieves an SNR of 94 dB with an OSR of 32.
Keywords :
analogue-digital conversion; circuit feedback; delta-sigma modulation; analogue-to-digital converter; bandpass ΔΣ-modulator; first-order error-feedback loop; implicit latency; internal quantiser; pipelined ADC based design;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2013.0739
