DocumentCode
1763836
Title
A Technique to Improve the Performance of an NPN HBT on Thin-Film SOI
Author
Misra, Prasanna Kumar ; Qureshi, Shaima
Author_Institution
Indian Inst. of Technol. Kanpur, Kanpur, India
Volume
1
Issue
4
fYear
2013
fDate
41365
Firstpage
92
Lastpage
98
Abstract
The performance of an npn SiGe HBT on thin-film silicon on insulator (SOI) is investigated using 2-D numerical simulation. A technique of using N+ buried layer has been presented to improve the performance of an SiGe HBT on thin-film SOI. The tradeoff in the performance of HBT has been observed and the results are compared to the standard SOI HBT. The HBT offers better βVA product at high collector currents. A 341 GHzV of ftBVCEO product can be obtained by using this technique. The scalability of film thickness is applied and the enhancement in the speed is observed. The self-heating performance of the proposed HBT is studied and the BOX thickness has been scaled to improve the thermal performance. The maximum lattice temperature is obtained. The proposed HBT is suitable for RF applications and can be used in addition to the existing 130 nm SOI CMOS technology for better performance.
Keywords
CMOS integrated circuits; Ge-Si alloys; heterojunction bipolar transistors; semiconductor thin films; silicon-on-insulator; 2-D numerical simulation; CMOS technology; HBT; NPN; RF applications; SiGe; collector currents; film thickness; maximum lattice temperature; self-heating performance; thermal performance; thin-film silicon on insulator; wavelength 130 nm; Doping; Films; Heating; Heterojunction bipolar transistors; Performance evaluation; Resistance; Silicon germanium; Self-heating; Sentaurus; SiGe HBT; silicon on insulator (SOI); thin BOX;
fLanguage
English
Journal_Title
Electron Devices Society, IEEE Journal of the
Publisher
ieee
ISSN
2168-6734
Type
jour
DOI
10.1109/JEDS.2013.2253597
Filename
6482578
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