Title :
2-D Analytical Model for the Threshold Voltage of a Tunneling FET With Localized Charges
Author :
Vishnoi, Rajat ; Kumar, M.J.
Author_Institution :
Dept. of Electr. Eng., IIT Delhi, New Delhi, India
Abstract :
In this paper, we have developed a 2-D analytical model for the surface potential and threshold voltage of a tunneling field-effect transistor (TFET) with localized charges in the oxide. These charges are generated in the oxide due to hot carrier effects in the channel. The models are derived by dividing the channel into damaged and undamaged regions and then solving the 2-D Poisson´s equation in these regions. The threshold voltage is then extracted by using constant current method. The proposed models are verified by using 2-D device simulations. The model can be used to study the impact of localized charges on the threshold voltage of a TFET for varying device dimensions and charge densities and can also be utilized to design TFET-based charge trapped memory devices.
Keywords :
Poisson equation; field effect transistors; hot carriers; semiconductor device models; surface potential; tunnelling; 2D Poisson´s equation; 2D analytical model; 2D device simulations; TFET-based charge trapped memory devices; charge densities; constant current method; device dimensions; hot carrier effects; localized charges; surface potential; threshold voltage; tunneling FET; tunneling field-effect transistor; undamaged regions; Electric potential; MOSFET; Numerical models; Silicon; Threshold voltage; Tunneling; 2-D modeling; hot carrier effects; localized charges; silicon-on-insulator; threshold voltage; tunneling field-effect transistor (TFET); tunneling field-effect transistor (TFET).;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2014.2332039
