DocumentCode
1765013
Title
LCL Filter Design and Inductor Current Ripple Analysis for a Three-Level NPC Grid Interface Converter
Author
Yang Jiao ; Lee, Fred C.
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Center for Power Electron. Syst., Blacksburg, VA, USA
Volume
30
Issue
9
fYear
2015
fDate
Sept. 2015
Firstpage
4659
Lastpage
4668
Abstract
The harmonic filter for a three-level neutral-point-clamped (NPC) grid interface converter is designed in this paper with good filtering performance and small component size. LCL topology is selected because of the attenuation and size tradeoff. The design of the inverter-side inductor L1 is emphasized due to its cost. A detailed inductor current ripple analysis is given based on the space vector modulation. The analysis derives the inductor volt-second and the maximum current ripple equation in line cycle. It also reveals the switching cycle current ripple distribution over a line cycle, with the consideration of power factor. The total system loss is calculated with different ripple current. Inductor L1 is determined by the loss and size tradeoff. Also the capacitor- and grid-side inductor L2 is designed based on attenuation requirement. Different damping circuits for LCL filter are compared and investigated in detail. The filter design is verified by both simulation and 200-kVA three-level NPC converter hardware.
Keywords
LC circuits; inductors; power factor; power grids; power harmonic filters; switching convertors; LCL filter design; NPC; apparent power 200 kVA; capacitor-side inductor; damping circuit; grid-side inductor; harmonic filter; inductor volt-second; inverter-side inductor current ripple analysis; maximum current ripple equation; power factor; space vector modulation; switching cycle current ripple distribution; three-level neutral-point clamped grid interface converter; Attenuation; Inductance; Inductors; Inverters; Power harmonic filters; Reactive power; Switches; Grid interface converter; LCL filter; harmonic attenuation; inductor current ripple; passive damping circuit;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2014.2361907
Filename
6918494
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